Most electronic systems are built on the integrated circuit, which is an ensemble of active (e.g., transistors) and passive devices (e.g., resistors and capacitors) formed on and within a single-crystal semiconductor substrate and interconnected by a metallization pattern. The power required merely to charge and discharge circuit nodes, or nets, in an IC is proportional to the number of gates (transistors) and the frequency at which they are switched (clock frequency). The power of any node may be expressed as: EQU P=.congruent.C.sub.node .times.V.sup.2 .times.F,
where C.sub.node is the capacitance of the node, V is the applied voltage and F is the clock frequency. The power in the chip is the summation of the power in all of the nodes. The temperature rise caused by this power dissipation in an IC package is limited by the thermal conductivity of the package material, unless auxiliary cooling is used. The maximum allowable temperature rise is limited by the bandgap of the semiconductor (approximately 100.degree. C. for Si with a bandgap of 1.1 eV). For such a temperature rise, the maximum power dissipation of a typical high-performance package is about 10 W. As a result, the maximum clock rate or the number of gates on a chip must be limited. Thus, the process of designing an IC includes estimating the power required by the IC to perform its intended function at a specified speed, or frequency. Moreover, the difficulty and cost of deriving such an estimation has dramatically increased as the average number of devices per chip has grown over the past few years.
Accordingly, a primary goal of the present invention is to provide an efficient, automatic and reliable tool for ascertaining the expected power dissipation in an IC. A further goal of the present invention is to provide a tool that employs existing circuit analysis software, thus making it an inexpensive tool especially useful in the IC design process. These goals are achieved by the present invention, a specific embodiment of which is described in this specification.